Onsemi's wafer-level power platform targets higher density

Onsemi has introduced a new architecture that uses the silicon wafer itself as an embedded package for power components. The design is intended to increase power density in semiconductor devices. This approach could lead to more compact power management solutions.
This announcement signals a shift in how power semiconductors are packaged, moving away from separate module housings toward integrating the silicon wafer itself as the structural base. By embedding components directly into the wafer, manufacturers can reduce interconnect losses and physical footprint, which is critical for applications like electric vehicles, data centers, and portable electronics where space and thermal efficiency are tightly constrained. The approach aligns with a broader industry trend toward wafer-level packaging and heterogeneous integration, though specific performance metrics or production timelines were not disclosed.
This could accelerate the miniaturization of power management in consumer devices, electric vehicles, and renewable energy systems, potentially lowering costs and improving energy efficiency for end users. Manufacturers may gain design flexibility, but supply chain shifts and retooling costs could affect smaller firms. If adopted widely, it might shorten product development cycles, yet adoption depends on yield and reliability—so near-term impact may be limited to premium segments.